rods»view/90

Status Summary for ROD ID 90

<<Prev | Next>>

Test NameStatusNotesModified
Board Status 1 The board passes all tests but the top DRAM test. It looks like using the rod_ddr_test_read(rod_half half, u_int32 addr, u_int32 read_data[32]) function is resulting in the DRAM becoming non-functioning and returning 0xffffffff when read. This appears to be fixed by changes to the lookuk contrl - DDRMan interface which now pass timing constraints. 24-03-2008
patch panel 1
24-03-2008
qpll lock 1
24-03-2008
ttc connectivity 1
24-03-2008
test fifo 1
24-03-2008
ddr reset
24-03-2008
assembly 1
24-03-2008
fuses 1
24-03-2008
U31 1
24-03-2008
U32 1
24-03-2008
U33 1
24-03-2008
U34 1
24-03-2008
U35 1
24-03-2008
U81 1
24-03-2008
U82 1
24-03-2008
I5V_initial 1
24-03-2008
I3V initial 1
24-03-2008
proms load 1
24-03-2008
I5V proms 1
24-03-2008
I3V proms 1
24-03-2008
V4T temp 1
24-03-2008
V4B temp 1
24-03-2008
connectivity 1
24-03-2008
loop data 1
100k itterations in 100 blocks of 1000; first 100 logs are for top, 2nd 100 are for bottom
24-03-2008
slink 1
24-03-2008
dram 1
Bottom passed, top failed with read data returned as 0xffffffff. This looks like an issue with the test code, see comments in history.
24-03-2008
nse communication 1
24-03-2008
sram
24-03-2008
optical loop 1
24-03-2008