rods»view/82
Status Summary for ROD ID 82
| Test Name | Status | Notes | Modified |
|---|---|---|---|
| Board Status | 1 | Draws a current surge 3.2A| 21-07-2008 | |
| fuses | 1 | 14-06-2008 | |
| U31 | 1 | 14-06-2008 | |
| U32 | 1 | 14-06-2008 | |
| U33 | 1 | 14-06-2008 | |
| U34 | 1 | 14-06-2008 | |
| U35 | 1 | 14-06-2008 | |
| U81 | 1 | 14-06-2008 | |
| U82 | 1 | 14-06-2008 | |
| I5V_initial | 1 | 14-06-2008 | |
| I3V initial | 1 | 14-06-2008 | |
| proms load | 1 | 14-06-2008 | |
| I5V proms | 1 | 14-06-2008 | |
| I3V proms | 1 | 14-06-2008 | |
| V4T temp | 1 | 14-06-2008 | |
| V4B temp | 1 | 14-06-2008 | |
| connectivity | 1 | 14-06-2008 | |
| loop data | 1 | 100k itterations in 100 blocks of 1000; first 100 logs are for top, 2nd 100 are for bottom. | 14-06-2008 |
| slink | 1 | 14-06-2008 | |
| dram | 1 | 14-06-2008 | |
| nse communication | 1 | 14-06-2008 | |
| sram | 14-06-2008 | ||
| optical loop | 1 | Top Passws with delay set to 35. Bottom Fails regardless of the Delay. Bill re-tested bottom and it worked first time.
With New Firmware and delays set to 31, both sides passed | 14-06-2008 |
| patch panel | 1 | 14-06-2008 | |
| qpll lock | 1 | 14-06-2008 | |
| ttc connectivity | 1 | 14-06-2008 | |
| test fifo | 1 | 14-06-2008 | |
| ddr reset | 14-06-2008 | ||
| assembly | 1 | 14-06-2008 |
