rods»view/49

Status Summary for ROD ID 49

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Test NameStatusNotesModified
Board Status 1 Feb 05/08: New DDRManager fixes DRAM (CG)Data gets through, but has issues that need investigating. Could not get QPLL lock to TTC, suspect this might be the root cause of the loop data test failure, might need QPLL crystal replaced. Or possible testfifo 101 issue (27/5/08 alex). Adam replaced QPLL crystal board now locks to TTC (28/05/08). Passed 100k top and bottom rod_dual_board_test_log in proxy to rod_loop_data_test (28/05/08 alex) 10-11-2009
fuses 1
30-10-2007
U31 1
30-10-2007
U32 1
30-10-2007
U33 1
30-10-2007
U34 1
30-10-2007
U35 1
30-10-2007
U81 1
30-10-2007
U82 1
30-10-2007
I5V_initial 1
30-10-2007
I3V initial 1
30-10-2007
proms load 1
30-10-2007
I5V proms 1
30-10-2007
I3V proms 1
30-10-2007
V4T temp 1
30-10-2007
V4B temp 1
30-10-2007
connectivity 1
30-10-2007
loop data 1
Not all channels repeporting valids and some channels latching early, see history blob for details. Also boards 25 and 32.see sttlog49 for failed fifo test 5/14 BM. Passed 100k top and bottom rod_dual_board_test_log.
30-10-2007
slink 1
30-10-2007
dram 1
Top passed, bottom fails with mig stuck in initialisation.Feb 05/08: New DDRManager fixes DRAM (CG)
30-10-2007
nse communication 1
30-10-2007
sram
30-10-2007
optical loop 1
30-10-2007
patch panel 1
30-10-2007
qpll lock 1
30-10-2007
ttc connectivity 1
30-10-2007
ddr reset
30-10-2007
assembly 1
30-10-2007