rods»view/48
Status Summary for ROD ID 48
| Test Name | Status | Notes | Modified |
|---|---|---|---|
| Board Status | 1 | 20-07-2008 | |
| fuses | 1 | 30-10-2007 | |
| U31 | 1 | 30-10-2007 | |
| U32 | 1 | 30-10-2007 | |
| U33 | 1 | 30-10-2007 | |
| U34 | 1 | 30-10-2007 | |
| U35 | 1 | 30-10-2007 | |
| U81 | 1 | 30-10-2007 | |
| U82 | 1 | 30-10-2007 | |
| I5V_initial | 1 | 30-10-2007 | |
| I3V initial | 1 | 30-10-2007 | |
| proms load | 1 | 30-10-2007 | |
| I5V proms | 1 | 30-10-2007 | |
| I3V proms | 1 | 30-10-2007 | |
| V4T temp | 1 | 30-10-2007 | |
| V4B temp | 1 | 30-10-2007 | |
| connectivity | 1 | 30-10-2007 | |
| loop data | 1 | 30-10-2007 | |
| slink | 1 | 30-10-2007 | |
| dram | 1 | 30-10-2007 | |
| nse communication | 1 | 30-10-2007 | |
| sram | 30-10-2007 | ||
| optical loop | 1 | 30-10-2007 | |
| patch panel | 1 | Passes when locked to TTC QPLL crystal. When locked to ROD crystal get buffer error from "2nd" gol chip, see boards 43 and 58 as well. | 30-10-2007 |
| qpll lock | 1 | 30-10-2007 | |
| ttc connectivity | 1 | 30-10-2007 | |
| test fifo | 1 | 30-10-2007 | |
| ddr reset | 30-10-2007 | ||
| assembly | 1 | 30-10-2007 |
