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Status Summary for ROD ID 37

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Test NameStatusNotesModified
Board Status 1 During inital testing had a single failure of loop data test. Now fully operational in USA15. ZG2015March: top fails DDR init, line 36 module 4 ZG2015April11: top runs bypassing DDR, but 1 line from SRAM seems to be dead as well ZG2015April29: Dorigo replaced top V4, now everything works 29-04-2015
fuses 1
29-10-2007
U31 1
29-10-2007
U32 1
29-10-2007
U33 1
29-10-2007
U34 1
29-10-2007
U35 1
29-10-2007
U81 1
29-10-2007
U82 1
29-10-2007
I5V_initial 1
29-10-2007
I3V initial 1
29-10-2007
proms load 1
29-10-2007
I5V proms 1
29-10-2007
I3V proms 1
29-10-2007
V4T temp 1
29-10-2007
V4B temp 1
29-10-2007
connectivity 1
29-10-2007
loop data 1
top failed first 100k run at event 17,631, "Wrong number of words in buffer: 0 Should be 1994". Passed 100k top second time. Operational in USA15 so considered to have passed this test, this should be verified with V4 v3.16 ,or later, at some point (27/05/08 alex).
29-10-2007
slink 1
29-10-2007
dram 1
29-10-2007
nse communication 1
29-10-2007
sram
29-10-2007
optical loop 1
29-10-2007
patch panel 1
29-10-2007
qpll lock 1
29-10-2007
ttc connectivity 1
29-10-2007
test fifo 1
29-10-2007
ddr reset
29-10-2007
assembly 1
29-10-2007