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Status Summary for ROD ID 33

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Test NameStatusNotesModified
Board Status 1 Operational in USA15, but initially failed loop data test (27/05/08 alex). dec 16, 2014: shipped to UBC for repairs Feb 2/15: CG: ddr data line 15 top looks dead. Feb, 2015: Components Replaced (C438). ZG2015Apr29: Dorigo replaced top V4, now everything works. 29-04-2015
fuses 1
27-10-2007
U31 1
27-10-2007
U32 1
27-10-2007
U33 1
27-10-2007
U34 1
27-10-2007
U35 1
27-10-2007
U81 1
27-10-2007
U82 1
27-10-2007
I5V_initial 1
27-10-2007
I3V initial 1
27-10-2007
proms load 1
27-10-2007
I5V proms 1
27-10-2007
I3V proms 1
27-10-2007
V4T temp 1
27-10-2007
V4B temp 1
27-10-2007
connectivity 1
27-10-2007
loop data 1
Top failed twice, at loop 4218 wrong # wds: 0 should be 1994 and after ~ loop 5000 ROD:Short DMA read! (16 != 1992) rod_dma_buffer failed!Should verify that board passes rod_loop_data_test with firmware V4 3.16 or later.  Operational in USA15 so do not expect any problems (27/05/08 alex).
27-10-2007
slink 1
27-10-2007
dram 1
27-10-2007
nse communication 1
27-10-2007
sram
27-10-2007
optical loop 1
27-10-2007
patch panel 1
27-10-2007
qpll lock 1
27-10-2007
ttc connectivity 1
27-10-2007
test fifo 1
27-10-2007
ddr reset
27-10-2007
assembly 1
27-10-2007