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Status Summary for ROD ID 29

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Test NameStatusNotesModified
Board Status 1 Jan 09, 2008 - 5V fuse (F1) was blown. Symptoms while board was in the crate looked like partial LED power with some on and others not being as bright as they should be. Board would also not reboot because the chips are not powered if both of the input voltages are not present. Removed bad fuse and soldered in a new one. Feb 05/08 - New DDRManager fixes top DDR (CG) Passed 100k top and bottom rod_dual_board_test_log in proxy to rod_loop_data_test (30/05/08 alex). Showed testfifo '101' fault during V4 version 3.1a loop data test validation (06/07/09 alex). 06-07-2009
fuses 1
26-10-2007
U31 1
26-10-2007
U32 1
26-10-2007
U33 1
26-10-2007
U34 1
26-10-2007
U35 1
26-10-2007
U81 1
26-10-2007
U82 1
26-10-2007
I5V_initial 1
26-10-2007
I3V initial 1
26-10-2007
proms load 1
26-10-2007
I5V proms 1
26-10-2007
I3V proms 1
26-10-2007
V4T temp 1
26-10-2007
V4B temp 1
26-10-2007
connectivity 1
26-10-2007
loop data 1
Bottom failed once at word 97422.see sttlog29 for failed fifo test 5/14 BM. Passed 100k top and bottom rod_dual_board_test_log.
26-10-2007
slink 1
26-10-2007
dram 1
51200 words written on top all read as ffffffffNew MIG fixes top Feb5/08.With V4 v3.16 bottom passed full test (27/05/08 alex).
26-10-2007
nse communication 1
26-10-2007
sram
26-10-2007
optical loop 1
26-10-2007
patch panel 1
26-10-2007
qpll lock 1
26-10-2007
ttc connectivity 1
26-10-2007
ddr reset
26-10-2007
assembly 1
26-10-2007