rods»view/18

Status Summary for ROD ID 18

tickets

<<Prev | Next>>

Test NameStatusNotesModified
Board Status 1 Sep 07: Top suffers from DDR-V4 calibration issues. June 26: passes on-bench power and connectivity test looks good in crate! 100,000 test fifo events and 10,000 real events ./ttc_rod for 1000, 10000 resets and triggers 100 slink events 100 seconds rocketio loopback. Board is operational in USA15 so is considered to have passed all tests, this might need to be verified at some point, the DDR calibration issue still needs investigation (alex 7/5/08). Could not load vchip v2.08 via xsvf in e-01. 07-05-2008
fuses 1
07-05-2008
U31
07-05-2008
U32
07-05-2008
U33
07-05-2008
U34
07-05-2008
U35
07-05-2008
U81
07-05-2008
U82
07-05-2008
I5V_initial
07-05-2008
I3V initial
07-05-2008
proms load
07-05-2008
I5V proms
07-05-2008
I3V proms
07-05-2008
V4T temp
07-05-2008
V4B temp
07-05-2008
connectivity 1
07-05-2008
loop data 1
07-05-2008
slink 1
07-05-2008
dram 1
See history for details.
07-05-2008
nse communication 1
07-05-2008
sram
07-05-2008
optical loop 1
07-05-2008
patch panel 1
07-05-2008
qpll lock 1
07-05-2008
ttc connectivity 1
07-05-2008
test fifo 1
07-05-2008
ddr reset
07-05-2008
assembly
07-05-2008